Xilinx V2.1 Instrukcja Użytkownika Pobierz pdf (Strona 79)

DSP 79

Xilinx Blocks

The Dual Port Block Memory LogiCORE datasheet can be found on your local disk at:

%XILINX%\coregen\ip\xilinx\eip1\com\xilinx\ip\blkmemdp_v3_2\do

c\dp_block_mem.pdf

FIR

The Xilinx FIR Filter Block implements a ﬁnite-impulse response (FIR)

digital ﬁlter, or a bank of identical FIR ﬁlters (multichannel mode). An

N-tap ﬁlter is deﬁned by N ﬁlter coefﬁcients (or taps) h(0), h(1), ....,h(n-

1). Here each h(i) is a Xilinx ﬁxed point number.

The ﬁlter block accepts a stream of Xilinx ﬁxed point data samples x(0),

x(1), ..., and at time n computes the output:

Block Interface

The FIR block takes one to eight inputs, x

(n): i Xilinx Blockset signal ﬁxed point

data samples.

The block produces the same number of output signals, y

(n): i Xilinx Blockset ﬁxed

point samples.

yn() hi()xn i–()

i 0=

N 1–

∑

1 2 ... 74 75 76 77 78 79 80 81 82 83 84 ... 147 148

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Xilinx V2.1 Instrukcja Użytkownika Strona 79