Xilinx LogiCORE IP CAN 3.2 Instrukcja Użytkownika Pobierz pdf (Strona 18)

18 www.xilinx.com CAN Getting Started Guide

UG186 April 19, 2010

Chapter 4: Detailed Example Design

Directory and File Contents

The CAN v3.2 core directories and their associated files are defined in the following

sections.

The <project directory> contains all the CORE Generator software project files.

<project_directory>/<component name>

The <component name> directory contains the release notes file provided with the core,

which may include last-minute changes and updates.

Table 4-1: Project Directory

Name Description

<project_dir>

<component_name>.ngc

Top-level netlist

<component_name>.v[hd]

Verilog or VHDL simulation model

<component_name>.xco

CORE Generator software project-

specific option file; can be used as an

input to the CORE Generator software.

<component_name>_flist.txt

List of files delivered with the core.

<component_name>.{veo|vho}

VHDL or Verilog instantiation

template.

Table 4-2: Component Name Directory

Name Description

<project_dir>/<component_name>

can_release_notes.txt

Core name release notes file.

1 2 ... 13 14 15 16 17 18 19 20 21 22 23 ... 27 28

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Xilinx LogiCORE IP CAN 3.2 Instrukcja Użytkownika Strona 18