Xilinx SP601 Hardware UG518 Instrukcja Użytkownika

[Guide Subtitle] [optional]UG518 (v1.1) August 19, 2009 [optional]SP601 Hardware User Guide UG518 (v1.1) August 19, 2009

10 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardFeaturesThe SP601 board provides the following

SP601 Hardware User Guide www.xilinx.com 11UG518 (v1.1) August 19, 2009Related Xilinx DocumentsBlock DiagramFigure 1-1 shows a high-level block diagra

12 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardDetailed DescriptionFigure 1-2 shows a board p

SP601 Hardware User Guide www.xilinx.com 13UG518 (v1.1) August 19, 2009Detailed Description1. Spartan-6 XC6SLX16-2CSG324 FPGAA Xilinx Spartan-6 XC6SLX

14 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardReferencesSee the Xilinx Spartan-6 FPGA docume

SP601 Hardware User Guide www.xilinx.com 15UG518 (v1.1) August 19, 2009Detailed DescriptionTable 1-5 shows the connections and pin numbers for the DDR

16 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardFigure 1-3 provides the user constraints file

SP601 Hardware User Guide www.xilinx.com 17UG518 (v1.1) August 19, 2009Detailed DescriptionFigure 1-4 provides the UCF constraints for the DDR2 SDRAM

18 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation Board3. SPI x4 FlashThe Xilinx Spartan-6 FPGA hosts

SP601 Hardware User Guide www.xilinx.com 19UG518 (v1.1) August 19, 2009Detailed DescriptionX-Ref Target - Figure 1-7Figure 1-7: SPI Flash Interface To

SP601 Hardware User Guide www.xilinx.com UG518 (v1.1) August 19, 2009Xilinx is disclosing this user guide, manual, release note, and/or specification

20 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardFigure 1-8 provides the UCF constraints for th

SP601 Hardware User Guide www.xilinx.com 21UG518 (v1.1) August 19, 2009Detailed DescriptionH16 FLASH_A6 23 A6H15 FLASH_A7 22 A7H14 FLASH_A8 20 A8H13 F

22 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardNote: Memory U10 pin 56 address A24 is not con

SP601 Hardware User Guide www.xilinx.com 23UG518 (v1.1) August 19, 2009Detailed Description5. 10/100/1000 Tri-Speed Ethernet PHYThe SP601 uses the onb

24 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardP18 PHY_RXD7 120A9 PHY_TXC_GTXCLK 14B9 PHY_TXC

SP601 Hardware User Guide www.xilinx.com 25UG518 (v1.1) August 19, 2009Detailed DescriptionReferencesSee the Marvell Alaska Gigabit Ethernet Transceiv

26 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardReferencesTechnical information on the Silicon

SP601 Hardware User Guide www.xilinx.com 27UG518 (v1.1) August 19, 2009Detailed Description8-Kb NV MemoryThe SP601 hosts a 8-Kb ST Microelectronics M2

28 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardOscillator Socket (Single-Ended, 2.5V or 3.3V)

SP601 Hardware User Guide www.xilinx.com 29UG518 (v1.1) August 19, 2009Detailed DescriptionTable 1-13: LPC PinoutKJ H G FE D C BA1NC NC VREF_A_M2C GND

UG518 (v1.1) August 19, 2009 www.xilinx.com SP601 Hardware User GuideRevision HistoryThe following table shows the revision history for this document.

30 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation Board34 NC NC LA30_P LA31_N NC NC TRST_L GA0 NC NC3

SP601 Hardware User Guide www.xilinx.com 31UG518 (v1.1) August 19, 2009Detailed DescriptionX-Ref Target - Figure 1-18NET "FMC_CLK0_M2C_N"

32 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation Board10. Status LEDsTable 1-14 defines the status L

SP601 Hardware User Guide www.xilinx.com 33UG518 (v1.1) August 19, 2009Detailed Description11. FPGA Awake LED and Suspend JumperThe suspend mode jumpe

34 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation Board12. FPGA INIT and DONE LEDsThe typical Xilinx

SP601 Hardware User Guide www.xilinx.com 35UG518 (v1.1) August 19, 2009Detailed Description13. User I/OThe SP601 provides the following user and gener

36 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardUser DIP switchThe SP601 includes an active hi

SP601 Hardware User Guide www.xilinx.com 37UG518 (v1.1) August 19, 2009Detailed DescriptionUser Pushbutton SwitchesThe SP601 provides five active high

38 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardGPIO Male Pin HeaderThe SP601 provides a 2X6 G

SP601 Hardware User Guide www.xilinx.com 39UG518 (v1.1) August 19, 2009Detailed DescriptionX-Ref Target - Figure 1-27NET "GPIO_LED_0"

SP601 Hardware User Guide www.xilinx.com UG518 (v1.1) August 19, 2009

40 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation Board14. FPGA_PROG_B Pushbutton SwitchThe SP601 pro

SP601 Hardware User Guide www.xilinx.com 41UG518 (v1.1) August 19, 2009Power ManagementThe SP601 uses power solutions from LTC. An estimate of the cur

42 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation BoardConfiguration OptionsThe FPGA on the SP601 Eva

SP601 Hardware User Guide www.xilinx.com 43UG518 (v1.1) August 19, 2009Configuration OptionsThe JTAG chain can be used to program the FPGA and access

44 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Chapter 1: SP601 Evaluation Board

SP601 Hardware User Guide www.xilinx.com 45UG518 (v1.1) August 19, 2009Appendix AReferencesThis section provides references to documentation supportin

46 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Appendix A: References

SP601 Hardware User Guide www.xilinx.com 47UG518 (v1.1) August 19, 2009Appendix BDefault Jumper and Switch SettingsTable B-1 shows the default jumper

48 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Appendix B: Default Jumper and Switch Settings

SP601 Hardware User Guide www.xilinx.com 49UG518 (v1.1) August 19, 2009Appendix CVITA 57.1 FMC ConnectionsTable C-1 shows the VITA 57.1 FMC LPC connec

SP601 Hardware User Guide www.xilinx.com 5UG518 (v1.1) August 19, 2009Preface: About This GuideGuide Contents . . . . . . . . . . . . . . . . . . . .

50 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Appendix C: VITA 57.1 FMC ConnectionsG13 FMC_LA08_N E11 H13 FMC_LA07_P E7G15 FM

SP601 Hardware User Guide www.xilinx.com 51UG518 (v1.1) August 19, 2009Appendix DSP601 Master UCFThe UCF template is provided for designs that target

52 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Appendix D: SP601 Master UCFNET "DDR2_LDQS_P" LOC =

SP601 Hardware User Guide www.xilinx.com 53UG518 (v1.1) August 19, 2009NET "FMC_LA07_P" LOC = "E7";NET "FM

54 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Appendix D: SP601 Master UCFNET "FPGA_CMP_MOSI" LOC =

SP601 Hardware User Guide www.xilinx.com 55UG518 (v1.1) August 19, 2009NET "PHY_TXCTL_TXEN" LOC = "B8";NET "PH

6 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Appendix A: ReferencesAppendix B: Default Jumper and Switch SettingsAppendix C

SP601 Hardware User Guide www.xilinx.com 7UG518 (v1.1) August 19, 2009PrefaceAbout This GuideThis manual accompanies the Spartan®-6 FPGA SP601 Evaluat

8 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Preface: About This GuideOnline DocumentThe following conventions are used in th

SP601 Hardware User Guide www.xilinx.com 9UG518 (v1.1) August 19, 2009Chapter 1SP601 Evaluation BoardOverviewThe SP601 board enables hardware and soft